1. Field of the Invention
This invention relates to materials and fabrication method for multi-layer wirings on a semiconductor device.
2. Description of the Related Art
In order to enhance integration density of LSI (Large Scale Integrated circuit), its wiring is becoming finer and finer. Accordingly, material of the wiring is required to have high electrical conductivity as well as good electrical contact with other wirings and electrodes. There are suitable materials available to meet this requirement, such as aluminum (referred to hereinafter as Al) or titanium silicide (referred to hereinafter as TiSi.sub.x). However, they are soluble by a hydrofluoric acid (referred to hereinafter as HF) solution, which is employed to remove undesirable native oxide of the semiconductor material or the wiring material in order to achieve a good contact with other wiring material. Therefore, there are problems in difficulty of the design as well as complication of the fabrication process of the LSI.
In reference to FIG. 1, the problems of prior art wirings will now be described in detail. On a semiconductor substrate 1, there is formed a doped region 2 of the semiconductor substrate 1. On insulating layers 3 and 5, each formed of silicon dioxide (referred to hereinafter as SiO.sub.2), there is a conductive layer-wiring 6 formed of TiSi.sub.2. On the SiO.sub.2 layer 3 and the TiSi.sub.2 layer 6, there is an insulating layer 4 formed of SiO.sub.2. On the SiO.sub.2 layer 4 there is another conductive layer-wiring, a top wiring, 7 formed of Al for connecting a doped Si region 2, the TiSi.sub.2 layer 6 and others. The SiO.sub.2 layer 5 is formed by a selective oxidization for laterally isolating the doped Si region 2. Basic fabrication process of the layer-wirings 6 and 7 is as follows. Contact holes 8 and 9 are opened through SiO.sub.2 layers 3 and 4, so that a part of the wiring 6 and a part of the doped Si region 2 are exposed. After undesirable native oxides of the exposed materials 2 and 6 in the contact holes 8 and 9 are chemically removed, Al wiring is patterned over the insulating layer 4 to make electrical connections with the exposed portions of the TiSi.sub.2 layer-wiring 6 and the doped Si region 2. In the above process for removing the native oxide, if a HF solution is used the TiSi.sub.2 layer 6 is etched. If argon+ spatter etching is employed for removing the native oxide in place of the HF solution, the surface of the doped Si region 2 is damaged by the physical bombardment of the argon ion, resulting in an increase in contact resistance between the Al wiring 7 and the doped Si region 2. Therefore, in order to avoid these problems a buffer layer may be introduced between the Al layer 7 and the doped Si region 2, and/or between the Al layer 7 and the TiSi.sub.2 layer 6. Or, if avoiding the introduction of the buffer layer, the contact hole 9 and the Al layer 7 are first fabricated, then the Al layer is coated with an SiO.sub.2 layer for protection against HF; secondly the contact hole 7' is opened and cleaned with HF solution for removing its native oxide, and Al layer 7' is deposited over the contact hole 8. Thus, either of these methods causes a difficulty of designing the semiconductor structure, or a considerable increase of the process steps, because the materials exposed in the contact holes are of differing types requiring different solvents suitable for each material. Thus, it is difficult to efficiently achieve a good electrical contact with each different material while completely free from affection of each other process.